Kevin Cernekee
2014-10-11 04:52:53 UTC
OHCI_QUIRK_FRAME_NO is currently set under either of the following
conditions:
1) If a ppc-of-ohci DT node indicates a compatible string of
"fsl,mpc5200-ohci" or "mpc5200-ohci"
2) If usb_ohci_pdata->no_big_frame_no is set
For #1, the affected platforms already enable CONFIG_PPC_MPC52xx.
For #2, there are currently no in-tree users.
So we can safely remove the #ifdef, and thereby allow OHCI_QUIRK_FRAME_NO
to be used by other (non-PPC) platforms that have the same property.
bcm63xx and bcm3384 are two such users.
Signed-off-by: Kevin Cernekee <cernekee-***@public.gmane.org>
---
drivers/usb/host/ohci.h | 19 +++++++++----------
1 file changed, 9 insertions(+), 10 deletions(-)
diff --git a/drivers/usb/host/ohci.h b/drivers/usb/host/ohci.h
index 59f4245..bc46228 100644
--- a/drivers/usb/host/ohci.h
+++ b/drivers/usb/host/ohci.h
@@ -647,23 +647,22 @@ static inline u32 hc32_to_cpup (const struct ohci_hcd *ohci, const __hc32 *x)
/*-------------------------------------------------------------------------*/
-/* HCCA frame number is 16 bits, but is accessed as 32 bits since not all
- * hardware handles 16 bit reads. That creates a different confusion on
- * some big-endian SOC implementations. Same thing happens with PSW access.
+/*
+ * The HCCA frame number is 16 bits, but is accessed as 32 bits since not all
+ * hardware handles 16 bit reads. Depending on the SoC implementation, the
+ * frame number can wind up in either bits [31:16] (default) or
+ * [15:0] (OHCI_QUIRK_FRAME_NO) on big endian hosts.
+ *
+ * Somewhat similarly, the 16-bit PSW fields in a transfer descriptor are
+ * reordered on BE.
*/
-#ifdef CONFIG_PPC_MPC52xx
-#define big_endian_frame_no_quirk(ohci) (ohci->flags & OHCI_QUIRK_FRAME_NO)
-#else
-#define big_endian_frame_no_quirk(ohci) 0
-#endif
conditions:
1) If a ppc-of-ohci DT node indicates a compatible string of
"fsl,mpc5200-ohci" or "mpc5200-ohci"
2) If usb_ohci_pdata->no_big_frame_no is set
For #1, the affected platforms already enable CONFIG_PPC_MPC52xx.
For #2, there are currently no in-tree users.
So we can safely remove the #ifdef, and thereby allow OHCI_QUIRK_FRAME_NO
to be used by other (non-PPC) platforms that have the same property.
bcm63xx and bcm3384 are two such users.
Signed-off-by: Kevin Cernekee <cernekee-***@public.gmane.org>
---
drivers/usb/host/ohci.h | 19 +++++++++----------
1 file changed, 9 insertions(+), 10 deletions(-)
diff --git a/drivers/usb/host/ohci.h b/drivers/usb/host/ohci.h
index 59f4245..bc46228 100644
--- a/drivers/usb/host/ohci.h
+++ b/drivers/usb/host/ohci.h
@@ -647,23 +647,22 @@ static inline u32 hc32_to_cpup (const struct ohci_hcd *ohci, const __hc32 *x)
/*-------------------------------------------------------------------------*/
-/* HCCA frame number is 16 bits, but is accessed as 32 bits since not all
- * hardware handles 16 bit reads. That creates a different confusion on
- * some big-endian SOC implementations. Same thing happens with PSW access.
+/*
+ * The HCCA frame number is 16 bits, but is accessed as 32 bits since not all
+ * hardware handles 16 bit reads. Depending on the SoC implementation, the
+ * frame number can wind up in either bits [31:16] (default) or
+ * [15:0] (OHCI_QUIRK_FRAME_NO) on big endian hosts.
+ *
+ * Somewhat similarly, the 16-bit PSW fields in a transfer descriptor are
+ * reordered on BE.
*/
-#ifdef CONFIG_PPC_MPC52xx
-#define big_endian_frame_no_quirk(ohci) (ohci->flags & OHCI_QUIRK_FRAME_NO)
-#else
-#define big_endian_frame_no_quirk(ohci) 0
-#endif