Daniel Karling
2014-10-15 21:07:52 UTC
Hi,
I noticed that the macro for extracting the number of scratchpad
buffers to allocate from the HCSPARAMS2 register differs from what is
defined in the specification.
Current macro is in xhci.h:
/* bits 27:31 number of Scratchpad buffers SW must allocate for the HW */
#define HCS_MAX_SCRATCHPAD(p) (((p) >> 27) & 0x1f)
This macro is used in scratchpad_alloc and scratchpad_free in xhci-mem.c.
According to "eXtensible Host Controller Interface for Universal
Serial Bus (xHCI)" revision 1.1, section 5.3.4, bits 27:31 are only
the five low order bits and there are five high order bits to get from
bits 21:25.
Is there any particular reason for why the macro is as it is, or is this a bug?
Note: I haven't seen any host controllers actually requesting so many
scratchpad buffers that any of the high bits have to be used, but I
thought it might cause issues in the future.
Regards,
Daniel Karling
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I noticed that the macro for extracting the number of scratchpad
buffers to allocate from the HCSPARAMS2 register differs from what is
defined in the specification.
Current macro is in xhci.h:
/* bits 27:31 number of Scratchpad buffers SW must allocate for the HW */
#define HCS_MAX_SCRATCHPAD(p) (((p) >> 27) & 0x1f)
This macro is used in scratchpad_alloc and scratchpad_free in xhci-mem.c.
According to "eXtensible Host Controller Interface for Universal
Serial Bus (xHCI)" revision 1.1, section 5.3.4, bits 27:31 are only
the five low order bits and there are five high order bits to get from
bits 21:25.
Is there any particular reason for why the macro is as it is, or is this a bug?
Note: I haven't seen any host controllers actually requesting so many
scratchpad buffers that any of the high bits have to be used, but I
thought it might cause issues in the future.
Regards,
Daniel Karling
--
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